EPROMs AS PLAs
by Harry Lythall - SM0VPO

A Programable Logic Array (PLA) is in reality a very small memory chip, often of the fusable link variety. We can have exactly the same functions in an EPROM and have more space left over for even more complex functions.

Basic PLA logic

The simplest application of an EPROM is to read a predetermined code as an instruction for a microprocessor. We can use this ability to store data to make a PLA to give a particular logic function. Imagine for a moment that you simply want to make a binary NAND gate: Draw the truth table and list the input terminal in binary-numerical order. These are the address terminals of the EPROM and the output is a data terminal:

AddressData
HexBits
7 6 5 4 3 2 1 0
Bits
7 6 5 4 3 2 1 0
Hex
00h0 0 0 0 0 0 0 00 0 0 0 0 0 0 101h
01h0 0 0 0 0 0 0 10 0 0 0 0 0 0 101h
02h0 0 0 0 0 0 1 00 0 0 0 0 0 0 001h
03h0 0 0 0 0 0 1 10 0 0 0 0 0 0 000h

In this example A0 and A1 are the inputs to the NAND gate and D0 is the output terminal. Note that the right-hand binary digit is the least significant digit and the numerical values will be given in Hexadecimal. As you can see, there are four combinations. Now let us add another NAND gate to the same EPROM:

AddressData
HexBits
7 6 5 4 3 2 1 0
Bits
7 6 5 4 3 2 1 0
Hex
00h0 0 0 0 0 0 0 00 0 0 0 0 0 1 002h
04h0 0 0 0 0 1 0 00 0 0 0 0 0 1 002h
08h0 0 0 0 1 0 0 00 0 0 0 0 0 1 002h
0Ch0 0 0 0 1 1 0 00 0 0 0 0 0 0 000h

For BOTH the NAND gates to work at the same time we must therefore consider all possible binary address combinations of both tables. This means copying the first table into all four possible combinations of the second table:

AddressData
HexBits
7 6 5 4 3 2 1 0
Bits
7 6 5 4 3 2 1 0
Hex
00h0 0 0 0 0 0 0 00 0 0 0 0 0 1 103h
01h0 0 0 0 0 0 0 10 0 0 0 0 0 1 103h
02h0 0 0 0 0 0 1 00 0 0 0 0 0 1 002h
03h0 0 0 0 0 0 1 10 0 0 0 0 0 1 002h
04h0 0 0 0 0 1 0 00 0 0 0 0 0 1 103h
05h0 0 0 0 0 1 0 10 0 0 0 0 0 1 103h
06h0 0 0 0 0 1 1 00 0 0 0 0 0 1 002h
07h0 0 0 0 0 1 1 10 0 0 0 0 0 1 002h
08h0 0 0 0 1 0 0 00 0 0 0 0 0 1 103h
09h0 0 0 0 1 0 0 10 0 0 0 0 0 1 103h
0Ah0 0 0 0 1 0 1 00 0 0 0 0 0 1 002h
0Bh0 0 0 0 1 0 1 10 0 0 0 0 0 1 002h
0Ch0 0 0 0 1 1 0 00 0 0 0 0 0 0 101h
0Dh0 0 0 0 1 1 0 10 0 0 0 0 0 0 101h
0Eh0 0 0 0 1 1 1 00 0 0 0 0 0 0 000h
0Fh0 0 0 0 1 1 1 10 0 0 0 0 0 0 000h

It is all very easy using squared paper and a highlighter pen to mark the vertical columns.The final code for the Dual NAND gate PLA is therefore given below with the EPROM start addresses at the left hand side in bold.

0000 : 03 03 02 02 03 03 02 02
0008 : 03 03 02 02 01 01 00 00

One other VERY important point, with even a small EPROM we have used only two data terminals and four address terminals, this leaves at least ten address pins and six data pins left for yet more logic functions. What's more, these logic functions can be made inter-related so that the function of one gate can change, depending upon the input conditions to another! Now, is that a powerfull tool or is it just a powerfull tool?

Latch Functions

Many logic functions require a latching function, that is the gate will remember a logic state. Easy - peasy! The task; I want to make a simple SET/RESET latch. This has two inputs. If the first input is briefly given a short positive pulse, will set the output high (1) and stay there, even when the pulse has gone. I also want another input which, if it receives a short positive pulse, will reset the output back to "0" again. I also want a second output that is the opposite polarity to the first output.

For my two inputs I will use A0 and A1. My output will be from D0, and it's complement will be A1. To make the EPROM remember a condition we must allow the device to control itself to set up a stable state. Connect the D0 output to the A2 input on the circuit board, now let us consider the program. There are three inputs, A0, A1 and A2, therefore there are only a total of 8 memory locations that need to be programmed.

AddressData
HexBits
7 6 5 4 3 2 1 0
Bits
7 6 5 4 3 2 1 0
Hex
00h0 0 0 0 0 0 0 00 0 0 0 0 0 1 002h
01h0 0 0 0 0 0 0 10 0 0 0 0 0 0 101h
02h0 0 0 0 0 0 1 00 0 0 0 0 0 1 002h
03h0 0 0 0 0 0 1 10 0 0 0 0 0 1 002h
04h0 0 0 0 0 1 0 00 0 0 0 0 0 0 101h
05h0 0 0 0 0 1 0 10 0 0 0 0 0 0 101h
06h0 0 0 0 0 1 1 00 0 0 0 0 0 1 002h
07h0 0 0 0 0 1 1 10 0 0 0 0 0 0 101h

Just look at the input binary pattern and consider what you want it to do for each possible combination. With both A0 and A1 low (0) then the output should be "2" so that D1 is the "NOT0". If A1 becomes a "1" then that location of memory contains "01" which sets D0 output to +5volts. Since D0 is also wired to A2 in the circuit then the EPROM will change it's own address by adding A2. This will cause the EPROM address to jump from "01" to "05". When the input pulse goes the address will change to "04" and that location also keeps D0 high. If you input a high to A1 then the address will become "06" and that location contains the data "02". The output is therefore low again and so the EPROM will change it's own address from "06" to "02".

The addresses "03" and "07" gave a small problem since this binary combination means both set AND reset! So what do we do? As you can see, I did nothing. If D0 was already a "1" I left it there, but if it was "0" I also left it there.

Conclusion

If it all sounds complicated, read that through a few times and it should become clear enough. If you did understand it all then try to make up a PLA for two NAND gates and a SET/RESET latch! This will need only 7 address pins and 3 data output pins so the EPROM is still far short of it's capacity. The code will only occupy address locations 0000h to 007Fh or 128 bytes, so even the smallest of EPROMS will hold quite a lot of code. Now you have the ability to create your own complex logic functions using cheap EPROMs.

I hope that you understood all of that. Now I will get back to the workbench and do some work on the next project and destroy a few more EPROMS.

Have fun and best regards from Harry

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