by Frank v Hughes

This circuit displays the logic state of 16 input lines as 1's and/or 0's on a C.R.O. screen using a novel circuit.


This circuit will simultaneously display the steady-state condition of up to 16 digital lines as two rows of 8 characters on an oscilloscope screen. Interface with the unit is; 16 inputs (must be "TTL" level, i.e. +5v or 0v ), X and Y outputs to CRO (which can be a lower performance type) and 5v dc to power the electronics.

I find this design interesting because it combines several electronic building blocks to achieve its function. These include: multivibrator, digital counter, 16 line multiplexer, 3 bit R-2R ladder type DAC (Digital to Analogue Convertor), sine wave oscillator and phase shift network (to give in-phase and 90 deg out of phase outputs), summing nodes and lissajous figures.


IC3 a & b is a cross-coupled multivibrator running at approx 2500Hz. Dissimilar value capacitors have been used to ensure reliable starting. This 'clocks' IC2 (74LS93) which acts as a "modulo 16" counter. Its 4 - bit binary weighted outputs are used as an address for IC1 (74LS150) which is an inverting 1 of 16 line multiplexer. Additionally the lower 3 of 4 address bits drive a "R-2R ladder type" DAC (IC3 c,d.e and associated resistors). This produces a voltage level which increments with each address change and provides an "X- pos'N" signal to the summing node. The most significant bit is used as a "Y-pos'N" signal to the CRO, the combination of the above producing two rows of 8 screen characters. The clock frequency is such that a flicker-free display of characters appears on the CRO screen. Q1 and its associated components are a sine wave oscillator of 18 kHz with in-phase and 90deg delayed (quadrature) outputs.

The display of a "1" or "0" character on the CRO is acheived thus: if input line is at logic 0 the multiplexer IC1 outputs logic 1 (invert) which allows the sine oscillators o/p to 'Y' and its quadrature to 'X' (thru the "summing nodes") this is in fact a lissajous figure of 1:1 freq' relationship , 90deg phase difference. (many textbooks refer) if signal line is at logic 1 multiplexer IC1 outputs logic 0 (invert), this then does two things:

  1. disables the quadrature output by sinking it to ground through diode D1.
  2. Thru inverter IC3f additionally holds the X-node voltage constant which results in a figure 1 displayed on screen.

It will be slightly right hand justified because of current supplied thru the 330k resistor to the 'X - node'


The output of the X-node is a combination of the X Pos'n shift and oscillator quadrature output. The output of the Y-node is a combination of Oscillator output and Y pos'n shift (MSB of address)

Any basic oscilloscope can be used, but of course must be switched to X-Y mode (internal timbase disabled). Adjustment of Y amp ( and X amp if any) gains will be needed to acheive a satisfactory display presentation. It is also apparent that display is only possible of steady state or slowly changing logical inputs.

I cannot claim originality for this clever design, although the schematic and technical description is my own. Original design sited UK/Euro "Elektor" electronic hobbyest mag' nr 51/52 JulyAaug 1979 page 7-65

If you have any questions related to this project then please refer them to the author Frank V. Hughes.

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